Date | Seminar | Seminar series |
---|---|---|
2009-02-25 12:00 2/25/09 |
Towards Correctness-Constrained Execution for Processor Designs
Timetable:
h 12:00
Aula Verde
|
Speaker:
Valeria Bertacco
(University of Michigan)
|
Strada le Grazie 15
37134 Verona
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