Reliability aware methods for robust design technology (RELMUST)

Starting date
July 6, 2009
Duration (months)
Computer Science, Department of Engineering for Innovation Medicine
Managers or local contacts
Fummi Franco

The world of electronic applications demands always more reliable components for safe
and dependable operations. These requirements are pervasively expanding from traditional
segments such as medical and space to transportation and consumer with much higher
production volumes. The design process concerning SoCs is challenged concurrently by three
main effects:
1. The progressive utilization of fine pitch technologies, where intrinsic reliability
phenomena are exasperated;
2. The relentless demand to reduce chip ASP’s;
3. The need to compress design cycle time and overall non recurring engineering;
The RELMUST project aims at boosting the design automation capabilities to support
these new conditions. To do this, the following tasks will be comprehensively developed:
1. Accurate modelling of reliability detractors (such as NBTI/HCI, EM, radiation effects,
EMI, etc);
2. Abstraction of their models at the highest level;
3. Concurrent evaluation of the reliability detractors, to enable realistic fault-injection
4. Development of SoC validation environment at the highest abstraction level;
5. Development of I-IPs for the monitoring and detection of errors and of a suitable test
infrastructure for the exploitation in-field of I-IPs.
RELMUST will thus produce four main advantages:
1. Allow an accurate and optimized budgeting of safe/dependable features within the
SoC, for matching the best trade-off between overhead and performance;
2. Achieve the evaluation of the safety/dependable features of SoC early in the design
process thanks to the utilization of Transaction Level Models;
3. Achieve a reliability-aware validation of the design at the system on chip level;
4. Reduce the overall design cycle time, by avoiding full-chip evaluation of safety
features at the lower abstraction levels.
RELMUST will demonstrate the developed tools and methodologies on realistic design
platforms using both core/bus/peripheral and network-on-chip architectures by mapping them
to a relevant technology node.


Funds: requested
Syllabus: EUROPA - Progetti Europei

Project participants

Nicola Bombieri
Full Professor
Franco Fummi
Full Professor
Graziano Pravadelli
Full Professor
Research areas involved in the project
Sistemi ciberfisici
Embedded and cyber-physical systems


Research facilities