Michele Lora

Foto,  May 4, 2017
Position
Research Scholarship Holders
Office
Ca' Vignal 2,  Floor 1,  Room 71
Telephone
+39 045 802 7048
E-mail
michele|lora*univr|it <== Replace | with . and * with @ to have the right email address.

Office Hours

Il ricevimento avviene esclusivamente su appuntamento da prendere tramite e-mail. E-mail da indirizzi diversi da quello istituzionale verranno automaticamente scartate. Gli Studenti sono pregati di cercare di prendere appuntamento almeno un paio di giorni (lavorativi) prima della data desiderata.

Curriculum

Modules

Modules running in the period selected: 3.
Click on the module to see the timetable and course details.

Course Name Total credits Online Teacher credits Modules offered by this teacher
Bachelor's degree in Computer Science Computer Architecture (2016/2017)   12  eLearning (Esercitazioni)
Bachelor's degree in Computer Science Operating Systems (2016/2017)   12  eLearning [Laboratorio 2] (Laboratorio)
Bachelor's degree in Computer Science Computer Architecture (2015/2016)   12  eLearning (Esercitazioni)

 
Skills
Topic Description Research area
Embedded system design Design techniques for the automatic generation of embedded hardware/software starting from transactional level models (TLM) and with emphasis on: - TLM-RTL synthesis and abstraction - RTL-to-SW abstraction - TLM transactor generation - Device-driver generation - Embedded SW for multicore systems - Hardware description language-based modeling - Middleware-based design Sistemi ciberfisici
Computer systems organization - Embedded and cyber-physical systems
Projects
Title Starting date
A framework for efficient TLM modeling and simulation of smart systems 2/29/16
TOYS - TOward Industrial Smart DisplaYS - Joint Projects 2015 1/1/16





Other positions held
Michele Lora
Office Collegial Body
component Collegio Didattico di Informatica - Department Computer Science