|Teoria||4||II semestre||Davide Quaglia|
|Laboratorio||2||II semestre||Davide Quaglia|
The course aims to provide the knowledge necessary for the understanding and development of networked embedded systems architectures, their use together with the techniques for their design. At the end of the course the student must show the acquisition of the ability to study and understand the functioning of networked embedded systems and the problems related to their use and their design, implementation and verification. This knowledge will enable the student to acquire the ability to use networked embedded systems in the fields of home automation, industrial automation, health, automotive, control and management of environmental resources. At the end of the course the student will be able to continue his/her studies independently in the design of networked embedded systems.
The class will describe the main communication protocols, design/simulation/verification methodologies as well as the design of networked control systems. The contents will be taken from state-of-the-art papers and research activities directly performed by the University of Verona.
Communication protocols for networked embedded systems
- Wireless networks
- Fieldbus networks
Methodologies for networked embedded systems
Networked control systems
- design techniques
- Networked embedded system programming
- Example of design of a networked embedded system
- Simulation of networked embedded systems
- Examples of design of networked control systems
To attend fruitfully the class, the students should know
Computer Architectures, Computer Networks, Embedded Systems Design, System Theory, SystemC, C/C++ programming.
The examination aims at verifying the comprehension of course contents. It consists of:
1) written or oral test (to be decided by the student) with 3 questions about the theory and laboratory part of the class
2) optional project consisting in:
- Bibliographic research (max 2 points, no team)
- Experimental activity (max 3 points, max 2 people per team)
For the project, synergies are possibles with other classes, stage and thesis.
The final result is computed by summing up the result of both the test (ranging from 18 to 30 points) and the project. Attribute "Laude" is given when 32-33 points are achieved.
|Teoria||John L. Hennessy, David A. Patterson||Computer Architecture - A Quantitative Approach (Edizione 5)||Morgan Kaufmann||2011||012383872X|
|Teoria||C. Hamacher, Z. Vranesic, S. Zaky, N. Manjikian||Introduzione all'architettura dei calcolatori (Edizione 1)||McGraw-Hill||2012||9788838667510|
|Teoria||Andrew S. Tanenbaum||Reti di calcolatori (Edizione 4)||Pearson - Prentice Hall||2003||8871921828|
|Teoria||J.F. Kurose, K.W. Ross||Reti di calcolatori e Internet - Un approccio top-down (Edizione 6)||Pearson Education Italia||2013||9788871929385|
|Laboratorio||John L. Hennessy, David A. Patterson||Computer Architecture - A Quantitative Approach (Edizione 5)||Morgan Kaufmann||2011||012383872X|
|Laboratorio||C. Hamacher, Z. Vranesic, S. Zaky, N. Manjikian||Introduzione all'architettura dei calcolatori (Edizione 1)||McGraw-Hill||2012||9788838667510|
|Laboratorio||Andrew S. Tanenbaum||Reti di calcolatori (Edizione 4)||Pearson - Prentice Hall||2003||8871921828|
|Laboratorio||J.F. Kurose, K.W. Ross||Reti di calcolatori e Internet - Un approccio top-down (Edizione 6)||Pearson Education Italia||2013||9788871929385|