Design automation of embedded systems (2017/2018)

Course code
4S02912
Name of lecturers
Tiziano Villa, Franco Fummi, Graziano Pravadelli
Coordinator
Tiziano Villa
Number of ECTS credits allocated
6
Academic sector
INF/01 - INFORMATICS
Language of instruction
Italian
Period
I sem. dal Oct 2, 2017 al Jan 31, 2018.

Lesson timetable

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Learning outcomes

This class introduces the fundamental algorithms for the automatic design of embedded systems, with particular emphasis on data structures to design and optimize digital systems and on automatic techniques for synthesis, verification and testing of embedded systems.

Syllabus

Representation of logic functions, multi-valued logic, binary decision diagrams, multi-level logic, netlist optimization with respect to area, timing and power consumption. State machines and sequential circuits, micro-architectural optimization.

Definition, characterization and simulation of defects, fault and error modeling, fault and error simulation. Test generation for combinatorial and sequential circuits, built-in self test, fault tolerance.

Dynamic assertion-based verification. Assertion qualification: assertion coverage, vacuum cleaning. Automatic generation of assertions.

Reference books
Author Title Publisher Year ISBN Note
Gary D.Hachtel, Fabio Somenzi Logic Synthesis and Verification Algorithms (Edizione 1) Kluwer Academic Publishers 1996 0792397460

Assessment methods and criteria

The exam includes:
- a written test with exercises and open questions covering the three parts of the program
- a project chosen by the student in one of the three parts of the program, under the supervision of the related instructor

The final score is the average of the scores in the written test and in the class project.

Teaching aids

Documents

Statistics about transparency requirements (Attuazione Art. 2 del D.M. 31/10/2007, n. 544)

Data from AA 2017/2018 are not available yet