Computer Architecture (2013/2014)



Course code
4S00011
Credits
12
Coordinator
Franco Fummi
Academic sector
ING-INF/05 - INFORMATION PROCESSING SYSTEMS
Language of instruction
Italian
Teaching is organised as follows:
Activity Credits Period Academic staff
Laboratorio [II turno M-Z] 2 II semestre, I semestre Nicola Bombieri
Laboratorio [I turno A-l] 2 II semestre, I semestre Nicola Bombieri
Teoria 9 II semestre, I semestre Franco Fummi
Esercitazioni 1 II semestre, I semestre Nicola Bombieri

Lesson timetable

I semestre
Activity Day Time Type Place Note
Laboratorio [I turno A-l] Tuesday 4:30 PM - 6:30 PM laboratorio Laboratory Delta  
Teoria Monday 2:30 PM - 4:30 PM lesson Lecture Hall Gino Tessari  
Teoria Thursday 8:30 AM - 10:30 AM lesson Lecture Hall D from Oct 31, 2013  to Jan 31, 2014
Laboratorio [II turno M-Z] Wednesday 4:30 PM - 6:30 PM laboratorio Laboratory Delta  
II semestre
Activity Day Time Type Place Note
Laboratorio [I turno A-l] Wednesday 2:30 PM - 4:30 PM laboratorio Laboratory Delta  
Teoria Monday 8:30 AM - 9:30 AM lesson Lecture Hall A  
Teoria Wednesday 11:30 AM - 1:30 PM lesson Lecture Hall A  
Teoria Friday 8:30 AM - 9:30 AM lesson Lecture Hall D  
Laboratorio [II turno M-Z] Thursday 2:30 PM - 4:30 PM laboratorio Laboratory Delta  

Learning outcomes

This course presents the theoretical and practical knowledge to implement an algorithm into a digital architecture. Some design alternatives are presented ranging from a pure software, running on a general purpose computer, to an ad-hoc hardware implementation. This design knowledge is fundamental for understanding in depth all mechanisms on the base of any information computing system and all steps of a compilation chain transforming an high-level programming language into machine-level code.

Syllabus

Fundamentals: information coding, Boolean functions, arithmetic.

Digital devices design: combinational circuits, sequential circuits, controller-datapath circuits, programmable units.

Computer architecture: basic principles, instruction set, elaboration unit, memory hierarchy, I/O organization, actual architectures, parallel architectures.

Practical exercises: automatic design of a programmable system, assembly programming of the Intel 80X86 architecture.

Assessment methods and criteria

Theory comprehension is checked through a written examination, eventually divided in parts that will be checked during each semester.
Practical skills are evaluated through two designs which can have a maximal impact of 4/30 on the final mark.
Theory without practical marks are preserved through examination sessions at the cost of a reduction.

Reference books
Activity Author Title Publisher Year ISBN Note
Teoria C. Hamacher, Z. Vranesic, S. Zaky, N. Manjikian Introduzione all'architettura dei calcolatori (Edizione 1) McGraw-Hill 2012 9788838667510 per la seconda parte del corso
Teoria Franco Fummi, Mariagiovanna Sami, Cristina Silvano Progettazione Digitale (Edizione 2) McGraw-Hill 2007 8838663521 per la prima parte del corso
Teaching aids
Title Format (Language, Size, Publication date)
programma dettagliato II semestre html html (it, 60 KB, 02/05/14)
programma dettagliato I semestre html html (it, 46 KB, 29/10/13)

Statistics about transparency requirements (Attuazione Art. 2 del D.M. 31/10/2007, n. 544)

Statistics
Outcomes Exams Outcomes Percentages Average Standard Deviation
Positive 79.06% 21 2
Rejected 4.65%
Absent 2.32%
Ritirati 13.95%
Canceled --
Distribuzione degli esiti positivi
18 19 20 21 22 23 24 25 26 27 28 29 30 30 e Lode
17.6% 17.6% 20.5% 11.7% 5.8% 5.8% 2.9% 5.8% 5.8% 2.9% 0.0% 2.9% 0.0% 0.0%

Data from AA 2013/2014 based on 43 students. I valori in percentuale sono arrotondati al numero intero più vicino.