FDL 2017: Forum on Specification & Design Languages

  dal 18/09/17 al 20/09/17.
Welcome to the Forum on Design and Specification Languages (FDL) for 2017. FDL is an international forum to exchange experiences and promote new trends in the application of languages, their associated design methods, and tools for the design of electronic systems. The three day technical program hopes to stimulate scientific discussions within and in between scientific topics that cover the mentioned topic areas.
We are delighted to have three keynote talks this year. The first keynote by Dr. Roberto Zafalon from ST Microelectronics, Italy, will discuss three major IoT challenges today: interoperability, security, and business model. The second keynote by Dr. Jan Kuper from QBayLogic will present a perspective on programming in a heterogeneous world. The final keynote by Prof. Sandeep K. Shukla from IIT Kanpur raises highly relevant questions on whether design and specification languages have a role in cyber-security. Additionally, we have two interesting hands-on tutorials on generating virtual prototypes from HIFSuite, and on the SPARK 2014 programming language. We also have two exciting panels discussing high-level languages in designing and verifying complex integrated systems, and whether languages for CPS are needed?
FDL received a total of 27 submissions, of which 13 (48.1%) were selected for inclusion in the IEEE proceedings, while 16 will be presented at the conference. Each of these submissions received an average of 4.8 reviews per paper by the members of the program committee. These presentations form five sessions in addition to the three keynotes, two hands-on tutorials, two panels, and one special session.
The success of FDL is the result of many dedicated individuals in the areas of design and specification languages. In particular, we are thankful to the program committee members who have made considerable contributions in ensuring the high quality of the program. The organizing committee members have worked extremely hard to ensure the success of FDL, and we extend our sincere gratitude to all of them for their dedication and hard work. Finally, we are greatly indebted to our sponsors: IEEE (Institute of Electrical and Electronics Engineers), CEDA (IEEE Council on Electronic Design Automation), IFIP Working Group 10.5 (Design and Engineering of Electronic Systems), ECSI (Electronic Chips & Systems Design Initiative) and the Department of Computer Science at the University of Verona.
It has always been the goal of the committees to continuously improve FDL to meet today's changing needs. As a result, we encourage participants to take the opportunity during the meeting to let us know how we can improve future FDL meetings. We always welcome your comments and suggestions. FDL is committed to building a strong and lively research community, and we encourage everyone to actively participate. We hope that FDL'17 will be interesting, educational, and fun.  We hope it will stimulate interesting discussions, and provide fruitful insights for your research.

Location
Keynote 1
  • IoT trends  and innovative applications - Roberto Zafalon, STMicroelectronics.
    The keynote will tackle with the three major IoT challenges today: interoperability, security, and business model (monetization). The strong enabling technologies roots (i.e. semiconductor and IP Design) will set the stage for a comprehensive view of the key IoT end-markets and of the most innovative applications expected to boost the massive deployment of IoT by the next 4 years.
Keynote 2
  • Programming in a Heterogeneous World - Jan Kuper, QBayLogic.
    This talk will argue that translation mechanisms from well known and well developed programming methodologies into low-level platform specific programming is doomed to fail because the way each type of computing platform deals with its internal space and time in a different way. Instead, we will argue that we should start from a really platform independent level, for which mathematics is a good candidate.
Keynote 3
  • Cyber Security of cyber physical critical infrastructure - Sandeep Shukla, IIT Kanpur.
    In this talk we  will explore this question, and we will show that there is indeed benefit in taking approaches based on formalized languages for system specification, or  system design, not only for analyzability at various abstraction levels of  risk, and visibility of attack vectors but also for better comprehension of  systemic risks, guiding resilient design of system architecture, and budgeting resources in optimal manner.

Welcome Reception Social Event
  • On Tuesday, September 19th at 8:30 p.m., all participants are invited to Re Teodorico restaurant. While having a beautiful view of Verona by night, we will serve a dinner and we invite everyone to have a nice summer evening with us. During this, contacts to other participants can be strengthened and the day is concluded in a relaxed atmosphere.
    The social event will start at 6:00 p.m. at the "Accademia" (6:30 p.m. at Piazza delle Erbe). We will collect all attendees at the “Accademia“ for the visit of the best historical sites of Verona. At the end of the visit (tentatively 8:15 p.m.) we will arrive to the funicular of Castel San Pietro, that we will use for reaching the restaurant.

Hands-on Tutorial 1 Hands-on Tutorial 2
Conference proceedings
  • File to be downloaded

Registration page for any other information, please, refer to the ECSI web site

Allegati




Referente
Franco Fummi

Dipartimento
Informatica

Organizzazione

Strutture del dipartimento